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Publications associées (32)

Material and Electrical study of HfO2-Based Resistive Random Access Memories (ReRAMs)

Behnoush Attarimashalkoubeh

Resistive Random Access Memories (ReRAMs) have been researched intensively in the last past decades as a promising alternatives technology for the next-generation non-volatile memory (NVM) devices. ReRAMâ s excellent performance properties such as high sw ...

EPFL2019

Training fully connected networks with resistive memories: impact of device failures

Giorgio Cristiano, Massimo Giordano, Martina Bodini

Hardware accelerators based on two-terminal non-volatile memories (NVMs) can potentially provide competitive speed and accuracy for the training of fully connected deep neural networks (FC-DNNs), with respect to GPUs and other digital accelerators. We rece ...

2019

ReRAM From Material Study to CMOS Co-integration

Elmira Shahrabi

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

EPFL2019

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Elmira Shahrabi, Yusuf Leblebici, Jury Sandrini, Carlo Ricciardi, Cecilia Giovinazzo, Oguz Tolga Celik

Resistive-switching random access memory (ReRAM) technologies are nowadays a good candidate to overcome the bottleneck of Von Neumann architectures, taking advantage of their logic-in-memory capability and the ability to mimic biological synapse behavior. ...

AMER CHEMICAL SOC2019

Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization

Elmira Shahrabi, Thomas La Grange, Yusuf Leblebici, Tugba Demirci

The integration of the resistive random access memory (ReRAM) with CMOS logic circuitry provides a solution to scaling limitations, and offers promising candidates for use in next generation computing applications. It is challenging to realize a reliable, ...

ELSEVIER SCIENCE BV2019

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

Alexandre Sébastien Julien Levisse

Resistive RAM (RRAM) is a promising emerging Non-Volatile Memory candidate due to its scalability and CMOS compatibility, which enables the fabrication of high density RRAM crossbar arrays in Back-End-Of-Line CMOS processes. Fast and accurate architectural ...

2019

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

Alexandre Sébastien Julien Levisse

2019

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

Fine-Grain Checkpointing with In-Cache-Line Logging

James Richard Larus, David Teksen Aksun, Nachshon Cohen

Non-Volatile Memory offers the possibility of implementing high-performance, durable data structures. However, achieving performance comparable to well-designed data structures in non-persistent (transient) memory is difficult, primarily because of the cos ...

ACM2019

Data-Retention-Time Characterization of Gain-Cell eDRAMs across the Design and Variations Space

Andreas Peter Burg, Andrea Bonetti

The rise of data-intensive applications has increased the demand for high-density and low-power embedded memories. Among them, the gain-cell embedded DRAM (GC-eDRAM) is a suitable alternative to the static random access memory (SRAM) due to its high memory ...

IEEE2019

Impact of conductance drift on multi-PCM synaptic architectures

Yusuf Leblebici, Irem Boybat Kara, Evangelos Eleftheriou, Abu Sebastian

In-memory computing with nanoscale memristive devices such as phase-change memory (PCM) has emerged as an alternative to conventional von Neumann systems to train deep neural networks (DNN) where a synaptic weight is represented by the device conductance. ...

IEEE2018

Perspective on training fully connected networks with resistive memories: Device requirements for multiple conductances of varying significance

Giorgio Cristiano, Massimo Giordano

Novel Deep Neural Network (DNN) accelerators based on crossbar arrays of non-volatile memories (NVMs)-such as Phase-Change Memory or Resistive Memory-can implement multiply-accumulate operations in a highly parallelized fashion. In such systems, computatio ...

2018

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