Publications associées à X86 virtualization

VIDEZZO: Dependency-aware Virtual Device Fuzzing

Mathias Josef Payer, Flavio Toffalini, Qiang Liu

A virtual machine interacts with its host environment through virtual devices, driven by virtual device messages, e.g., I/O operations. By issuing crafted messages, an adversary can exploit a vulnerability in a virtual device to escape the virtual machine, ...

Institute of Electrical and Electronics Engineers Inc.2023

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

EPFL2023

Systematic design of a multi-input multi-output controller by model-based decoupling: a demonstration on TCV using multi-species gas injection

Basil Duval, Christian Gabriel Theiler, Cristian Galperti, Artur Perek

In this paper, we present the first results of a systematically designed multi-input multi-output gas-injection controller on Tokamak a Configuration Variable (TCV). We demonstrate the simultaneous real-time control of the NII emission front position and l ...

IOP Publishing Ltd2023

Enclosure: Language-Based Restriction of Untrusted Libraries

James Richard Larus, Mathias Josef Payer, Edouard Bugnion, Evangelos Marios Kogias, Adrien Ghosn

Programming languages and systems have failed to address the security implications of the increasingly frequent use of public libraries to construct modern software. Most languages provide tools and online repositories to publish, import, and use libraries ...

ACM2021

Rebooting Virtual Memory with Midgard

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Atri Bhattacharyya, Yunho Oh, Abhishek Bhattacharjee

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

2021

Self-Organized Laboratories for Smart Campus

Denis Gillet, Christophe Salzmann

A smart campus provides students who are geographically scattered with online tools to get access to learning resources and laboratories. Although these remote laboratories have the potential and capabilities to implement different learning experiments, mo ...

IEEE COMPUTER SOC2020

Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography

Francesco Regazzoni, Subhadeep Banik, Hamid Nejatollahi

The advent of the quantum computer makes current public-key infrastructure insecure. Cryptography community is addressing this problem by designing, efficiently implementing, and evaluating novel public-key algorithms capable of withstanding quantum comput ...

ASSOC COMPUTING MACHINERY2020

SoK: Shining Light on Shadow Stacks

Mathias Josef Payer, Xiangyu Zhang

Control-Flow Hijacking attacks are the dominant attack vector against C/C++ programs. Control-Flow Integrity (CFI) solutions mitigate these attacks on the forward edge, i.e., indirect calls through function pointers and virtual calls. Protecting the backwa ...

IEEE COMPUTER SOC2019

Massively parallel data processing for quantitative total flow imaging with optical coherence microscopy and tomography

Theo Lasser, Paul James Marchand, Daniel Pawel Szlag, Marcin Antoni Sylwestrzak

We present an application of massively parallel processing of quantitative flow measurements data acquired using spectral optical coherence microscopy (SOCM). The need for massive signal processing of these particular datasets has been a major hurdle for m ...

Elsevier2017

Near-Memory Address Translation

Javier Picorel Obando

Virtual memory (VM) is a crucial abstraction in modern computer systems at any scale, from handheld devices to datacenters. VM provides programmers the illusion of an always sufficiently large and linear memory, making programming easier. Although the core ...

EPFL2017

Near-Memory Address Translation

Babak Falsafi, Javier Picorel Obando, Dorde Jevdic

Memory and logic integration on the same chip is becoming increasingly cost effective, creating the opportunity to offload data-intensive functionality to processing units placed inside memory chips. The introduction of memory-side processing units (MPUs) ...

Ieee2017

The IX Operating System: Combining Low Latency, High Throughput, and Efficiency in a Protected Dataplan

Edouard Bugnion, Christos Kozyrakis, Georgios Prekas, Mia Primorac, Ana Klimovic

The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and μs-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. We present ix, a dataplane operating system ...

Association for Computing Machinery2016

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

Paolo Ienne, Mikhail Asiatici, Nithin George

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly ...

Ieee2016

Efficient Communication and Synchronization on Manycore Processors

Darko Petrovic

The increased number of cores integrated on a chip has brought about a number of challenges. Concerns about the scalability of cache coherence protocols have urged both researchers and practitioners to explore alternative programming models, where cache co ...

EPFL2015

Buffer overlow vulnerabilities in CUDA: a preliminary analysis

Andrea Miele

We present a preliminary study of buffer overflow vulnerabilities in CUDA software running on GPUs. We show how an attacker can overrun a buffer to corrupt sensitive data or steer the execution flow by overwriting function pointers, e.g., manipulating the ...

Springer France2015

Laboratory as a Service (LaaS): a Model for Developing and Implementing Remote Laboratories as Modular Components

Denis Gillet, Christophe Salzmann, Mohamed Tawfik

This contribution introduces a novel model, Laboratory as a Service (LaaS), for developing remote laboratories as independent component modules and implementing them as a set of loosely-coupled services to be consumed with a high level of abstraction and v ...

IEEE2014

IX: A Protected Dataplane Operating System for High Throughput and Low Latency

Edouard Bugnion, Christos Kozyrakis, Georgios Prekas, Ana Klimovic

The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and microsecond-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. We present IX, a dataplane operati ...

USENIX2014

Submicrometer Organic Thin-Film Transistors: Technology Assessment Through Noise Margin Analysis of Inverters

Christian Enz, Jean-Michel Sallese, Rolando Ferrini, Franz Xaver Pengg, Nenad Marjanovic, Frédéric Zanella

In this paper, we propose a methodology to evaluate the potential of submicrometer organic thin-film transistors (OTFTs) with nanoimprinted gate and self-aligned source and drain contacts. In the first step, the dedicated static model we previously reporte ...

Institute of Electrical and Electronics Engineers2014

SIMinG-1k: A thousand-core simulator running on general-purpose graphical processing units

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

This paper introduces SIMinG-1k-a manycore simulator infrastructure. SIMinG-1k is a graphics processing unit accelerated, parallel simulator for design-space exploration of large-scale manycore systems. It features an optimal trade-off between modeling acc ...

Wiley-Blackwell2013

Correlation-Aware Virtual Machine Allocation for Energy-Efficient Datacenters

David Atienza Alonso, Martino Ruggiero, Jungsoo Kim, Marcel Ledergerber

Server consolidation plays a key role to mitigate the continuous power increase of datacenters. The recent advent of scale-out applications (e.g., web search, MapReduce, etc.) necessitate the revisit of existing server consolidation solutions due to distin ...

ACM and IEEE Press2013