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Didier Bouvet

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Publications associées (58)

Fault-Tolerant Multi-Level Logic Decoder for Nanoscale Crossbar Memory Arrays

Didier Bouvet, Yusuf Leblebici, Mihai Adrian Ionescu, Kirsten Emilie Moselund, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we suggest a way to reduce the decoder size and keep it defect tolerant by using mu ...

2007

Low temperature single electron characteristics in gate-all-around MOSFET

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Kirsten Emilie Moselund

2006

Co-integration of gate-all-around MOSFETs and local silicon-on insulator optical waveguides on bulk silicon for GHz on-chip optical signaling

Didier Bouvet, Romuald Houdré, Vincent Pott, Mihai Adrian Ionescu, Kirsten Emilie Moselund, Christoph Eggimann, Nicolas Le Thomas

2006

Electrical conduction in 10 nm thin polysilicon wires from 4 to 400 K and their operation for hybrid memory

Didier Bouvet, Serge Ecoffey, Mihai Adrian Ionescu, Santanu Mahapatra

2006

Polyimide sacrificial layer for SOI SG-MOSFET pressure sensor

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Georges-André Racine, Nicolas Abelé, Montserrat Fernandez-Bolanos Badia

This paper reports on the fabrication and electrical characterization of a novel pressure sensor based on a suspended-gate MOSFET (SG-MOSFET) using a new polyimide process. The device is composed of a SG-MOSFET built on a thin SOI membrane released by a ba ...

Elsevier2006

Coulomb blockade in gate-all-around silicon nanowire MOSFETs

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Kirsten Emilie Moselund

2006

Gate-all-around MOSFETs: true fabrication and characteristics

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Kirsten Emilie Moselund

2006

Hybrid Nanowire-MOS circuit architectures: from basic physics to digital and analog applications

Didier Bouvet, Serge Ecoffey, Vincent Pott, Mihai Adrian Ionescu, Santanu Mahapatra

2006

Local volume inversion and corner effects in triangular gate-all-around MOSFETs

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Kirsten Emilie Moselund

2006

Electrical conduction in 10nm-thin polysilicon wires from 4K to 400K and their operation for hybrid memory

Didier Bouvet, Serge Ecoffey, Mihai Adrian Ionescu

2005

High Performance Copper / Polyimide Inductors Fabricated Using Thick Double Metal Layer Damascene Process

Didier Bouvet, Catherine Dehollain, Mihai Adrian Ionescu, Cyrille Hibert

2005

New Logic Family Based on Hybrid MOSFET-Polysilicon Nano-Wires

Didier Bouvet, Michel Declercq, Serge Ecoffey, Alexandre Schmid, Yusuf Leblebici, Vincent Pott, Mihai Adrian Ionescu, Marco Mazza

2005

Low temperature investigation of electrical conduction in polysilicon: simulation and experiment

Didier Bouvet, Serge Ecoffey, Vincent Pott, Mihai Adrian Ionescu, Santanu Mahapatra

2005

Fabrication of polysilicon gated-nanowires and their application for pA precision current measurements

Didier Bouvet, Michel Declercq, Serge Ecoffey, Yusuf Leblebici, Vincent Pott, Mihai Adrian Ionescu

2005

Fabrication and electrical characterization of high performance copper/polyimide inductors

Didier Bouvet, Catherine Dehollain, Mihai Adrian Ionescu, Cyrille Hibert

This paper presents fabrication and RF characterization results of spiral inductors fabricated using a developed damascene-like thick-copper / polyimide process module. This module has low thermal budget and is compatible with current IC interconnect archi ...

2005

Polyimide sacrificial layer process for SOI SG-MOSFET pressure sensor

Didier Bouvet, Vincent Pott, Mihai Adrian Ionescu, Georges-André Racine, Nicolas Abelé, Montserrat Fernandez-Bolanos Badia

2005

A hybrid CMOS-SET co-fabrication platform using nano-grain polysilicon wires

Didier Bouvet, Serge Ecoffey, Vincent Pott, Mihai Adrian Ionescu, Santanu Mahapatra

This paper presents a process for the co-fabrication of self-aligned NMOS and single electron transistors made by gated polysilicon wires. The realization of SET–MOS hybrid architectures is also reported. The proposed process exploits an original low energ ...

2005

Etude et optimisation de couches minces de SiO2 nitrurées sous N2O

Didier Bouvet

EPFL1997

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