Publications related to NAND gate

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Boolean Rewriting Strikes Back: Reconvergence- Driven Windowing meets Resynthesis

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

The paper presents a novel DAG-aware Boolean rewriting algorithm for restructuring combinational logic before technology mapping. The algorithm, called window rewriting, repeatedly selects small parts of the logic and replaces them with more compact implem ...

IEEE2022

LiNiO Junction Gate for High-performance Enhancement-mode GaN Power Transistor

Taifang Wang

GaN metal-oxide-semiconductor high electron mobility transistors (MOS)HEMTs) offer outstanding properties for next-generation power electronics devices. The high conductivity, high voltage blocking capability, high operation frequency, and device-level int ...

EPFL2022

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Francesco Regazzoni, Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. In the past there have been numerous papers that have looked at circuit level implementation of block ciphers ...

IEEE2021

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Heterostructure design and field management in III-N high-electron mobility electronic devices

Catherine Erine

III-N family of materials has offered multiple groundbreaking technologies in the field of optoelectronics and high-power radio-frequency (RF) devices. Blue light-emitting diodes (LEDs) have revolutionized low-energy lighting. Gallium nitride (GaN) RF mark ...

EPFL2021

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Simon Nessim Henein, Hubert Pierre-Marie Benoît Schneegans, Ilan Vardi, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

2020

Sweat monitoring with CMOS compatible technology: ISFETS and beyond

Francesco Bellando

In recent years, sweat has gained increasing attention from the scientific community as a new analyte for health monitoring. The main advantage with respect to the "Gold Standard" for laboratory analysis, i.e. blood, is of course the possibility of perform ...

EPFL2020

Logic-in-memory based on an atomically thin semiconductor

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Ahmet Avsar, Yanfei Zhao, Guilherme Migliato Marega, Zhenyu Wang

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

2020

A Magnet-Based Timing System to Detect Gate Crossings in Alpine Ski Racing

Kamiar Aminian, Benedikt Fasel

In alpine skiing, intermediate times are usually measured with photocells. However, for practical reasons, the number of intermediate cells is limited to three⁻four, making a detailed timing analysis difficult. In this paper, we propose and validate a magn ...

2019

Triboelectric‐TFT Flip‐Flop for Bistable Latching of Dielectric Elastomer Actuators

Danick Briand, Herbert Shea, Rubaiyet Iftekharul Haque, Alexis Pierre Henri Marette, Xiaobin Ji, Ronan Julien Hinchet

A high‐voltage flip‐flop combining two self‐powered soft sensors with a flexible high‐voltage thin film transistor (HVTFT) is reported, and is used to electrically latch dielectric elastomer actuators (DEAs) in zero and high‐strain states. Two touch‐actuat ...

2019

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

Reducing the number of AND gates plays a central role in many cryptography and security applications. We propose a logic synthesis algorithm and tool to minimize the number of AND gates in a logic network composed of AND, XOR, and inverter gates. Our appro ...

ASSOC COMPUTING MACHINERY2019

High-performance normally-off tri-gate GaN power MOSFETs

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Minghua Zhu

In this work, we present the investigation of the combination of gate recess and tri-gate structures to achieve high performance normally-off GaN-on-Si MOSFETs with high positive threshold voltage ( VTH ), low specific on resistance ( RON,SP ) and high out ...

IEEE2019

Functionality Enhanced Memories for Edge-AI Embedded Systems

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Pierre-Emmanuel Julien Marc Gaillardon, Marco Antonio Rios, William Andrew Simon

With the surge in complexity of edge workloads, it appeared in the scientific community that such workloads cannot be anymore overflown to the cloud due to the huge edge device to server communication energy cost and the high energy consumption induced in ...

IEEE2019

Field-effect transistor device or sensor for sensing ions, molecules or biomarkers in a fluid

Mihai Adrian Ionescu, Junrui Zhang, Erick Antonio Garcia Cordero, Francesco Bellando

The present disclosure concerns a Field-Effect Transistor device or sensor comprising at least one drain region, at least one source region, at least a channel region, at least a first gate connected to the channel region, at least one stack comprising at ...

2019

A 512 x 512 SPAD Image Sensor With Integrated Gating for Widefield FLIM

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Arin Can Ülkü

In this paper, we report on SwissSPAD2, an image sensor with 512 x 512 photon-counting pixels, each comprising a single-photon avalanche diode (SPAD), a 1-b memory, and a gating mechanism capable of turning the SPAD ON and OFF, with a skew of 250 and 344 p ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

On the Dynamic Performance of Laterally Gated Transistors

Elison de Nazareth Matioli, Armin Jafari, Catherine Erine, Giovanni Santoruvo, Mohammad Samizadeh Nikooytabalvandani

Laterally gated transistors have been proposed as an innovative device architecture in which a semiconducting channel is controlled by side gates. In this sense, the gate can either be in contact with the sidewalls or be separated by a gap. In the latter c ...

Institute of Electrical and Electronics Engineers2019

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

Cunxi Yu, Maciej Jerzy Ciesielski

The paper presents a novel method to verify and debug gate-level arithmetic circuits implemented in Galois Field arithmetic. The method is based on forward reduction of the specification polynomials of the circuit in GF(2(m)) using GF(2) models of its logi ...

IEEE2018

Improvements to Boolean resynthesis

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù

In electronic design automation Boolean resynthesis techniques are increasingly used to improve the quality of results where algebraic methods hit local minima Boolean methods rely on complete functional properties of a logic circuit, preferably including ...

IEEE2018

Area and Power Efficient Ultra-Wideband Transmitter Based on Active Inductor

Catherine Dehollain, Kerim Türe, Arnout Jan J Devos, Franco Maloberti

This paper presents the design of an impulse radio ultra-wideband (IR-UWB) transmitter for low-power, short-range, and high-data rate applications such as high density neural recording interfaces. The IR-UWB transmitter pulses are generated by modulating t ...

2018