Publications associées à Register Transfer Level

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Scalable Logic Rewriting Using Don’t Cares

Giovanni De Micheli, Alessandro Tempia Calvino

Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

2024

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Pengbo Yu, Flavio Ponzina

Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

IEEE2024

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

EPFL2023

An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Tomas Teijeiro Campo, Silvio Zanoli, Flavio Ponzina

Event-based sensors have the potential to optimize energy consumption at every stage in the signal processing pipeline, including data acquisition, transmission, processing, and storage. However, almost all state-of-the-art systems are still built upon th ...

2023

Ultra-Low Power Short-Range 60-GHz FMCW Radar Front-End

Sammy Cerida Rengifo

The millimeter wave (mmWave) frequency band is becoming very interesting over the past years because it provides the opportunity to operate using large bandwidths which are not available at lower frequencies. This enables new communication standards suppor ...

EPFL2023

Energy Efficient Logic and Memory Design With Beyond-CMOS Magnetoelectric Spin-Orbit (MESO) Technology Toward Ultralow Supply Voltage

Kyojin Choo

Devices based on the spin as the fundamental computing unit provide a promising beyond-complementary metal-oxide-semiconductor (CMOS) device option, thanks to their energy efficiency and compatibility with CMOS. One such option is a magnetoelectric spin-or ...

Ieee-Inst Electrical Electronics Engineers Inc2023

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

Giovanni De Micheli, Andrea Costamagna

Approximate logic synthesis is an emerging field that tolerates errors in the synthesized logic circuits for better optimization quality. Indeed, in many computing problems, the requirement of preserving the exact functionality either results in unnecessar ...

IEEE2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Shubham Rai, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

MALTA3: Concepts for a new radiation tolerant sensor in the TowerJazz 180 nm technology

Francesco Piro

The upgrade of the MALTA DMAPS designed in Tower 180 nm CMOS Imaging process will implement the numerous modifications, as well as front-end changes in order to boost the charge collection efficiency after the targeted fluence of 1x10(15) 1 MeVn(eq)/cm(2). ...

ELSEVIER2022

Cost-Based Decision Support System: A Dynamic Cost Estimation of Key Performance Indicators in Manufacturing

Dimitrios Kyritsis, Foivos Psarommatis Giannakopoulos

An attempt is made to translate five generic key performance indicators (KPIs) into a continuous real-time cost function in a batch order-based manufacturing environment. The challenge of controlling and optimizing resource utilization, production efficien ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Uncooperative Rendezvous in Space: Design of an Electronic Architecture for High Performance Avionic with Multi Sensor Input and Intensive Data Rate

Michaël Yannick Juillard

Active Debris Removal missions consist of sending a satellite in space and removing one or more debris from their current orbit. A key challenge is to obtain information about the uncooperative target. By gathering the velocity, position, and rotation of t ...

EPFL2022

Hardware-Friendly Random Forest Classification of iEEG Signals for Implantable Seizure Detection

Alexandre Schmid, Keyvan Farhang Razi

Early and accurate detection of epileptic seizures is an extremely important therapeutic goal due to the severity of complications it can prevent. To this end, a low-power machine learning-based seizure detection implemented on an FPGA is proposed in this ...

IEEE2022

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

Logic Resynthesis of Majority-Based Circuits by Top-Down Decomposition

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

Logic resynthesis is the problem of finding a dependency function to re-express a given Boolean function in terms of a given set of divisor functions. In this paper, we study logic resynthesis of majority-based circuits, which is motivated by the increasin ...

IEEE2021

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Francesco Regazzoni, Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. In the past there have been numerous papers that have looked at circuit level implementation of block ciphers ...

IEEE2021

Kilowatt-range Picosecond Switching Based on Microplasma Devices

Elison de Nazareth Matioli, Remco Franciscus Peter van Erp, Armin Jafari, Mohammad Samizadeh Nikooytabalvandani

Plasma formation in micro- and nano-scales enables an ultrahigh-dv/dt picosecond switching in an integrated circuit form factor. Such on-chip plasma devices could provide a transformative approach to achieving high-power levels at very high frequencies, fa ...

Institute of Electrical and Electronics Engineers2021

System-level Design of Adaptive Wearable Sensors for Health and Wellness Monitoring

Elisabetta De Giovanni

In recent years, population aging and the consequent higher incidence of noncommunicable diseases, have increased the need for long-term health monitoring. Moreover, as healthcare cost is projected to grow substantially by 2030 in OECD countries, the deman ...

EPFL2021

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

Eleonora Testa

Logic synthesis is a key component of digital design and modern EDA tools; it is thus an essential instrument for the design of leading-edge chips and to push the limits of their performance. In the last decades, the electronic circuits community has evolv ...

EPFL2020