Publications de Didier Bouvet | EPFL Graph Search

A BEAM PROFILE MONITOR FOR HIGH ENERGY PROTON BEAMS USING MICROFABRICATION TECHNIQUES

In High Energy Physics (HEP) experiments it is a common practice to expose electronic components and systems to particle beams, in order to assess their level of radiation tolerance and reliability when operating in a radiation environment. One of the faci ...

JACoW Publishing2020

Transient current technique for charged traps detection in silicon bonded interfaces

Didier Bouvet, Jean-Michel Sallese, Alessandro Mapelli

Wafer bonding is an established technology for the manufacturing of silicon-on-insulator (SOI) substrates, microelectromechanical systems (MEMS) and microfluidic devices. Low temperature direct bonding techniques can be of particular interest for the fabri ...

2019

Radiation enhanced oxidation of proton-irradiated copper thin-films: Towards a new concept of ultra-high radiation dosimetry

Didier Bouvet, Jean-Michel Sallese, Georgi Gorine, Federico Ravotti

The effects of extreme radiation levels on the electrical resistivity of metal thin films made of copper were studied by means of electrical measurements and post irradiation imaging. Different 3x3 mm(2) chips were produced by depositing 500 nm of meander ...

2019

Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon

Didier Bouvet, Mihai Adrian Ionescu, Sara Rigante, Antonios Bazigos, Elizabeth Buitrago Godinez, Paolo Scarbolo

Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technolo ...

Amer Chemical Soc2015

Technological development of high-k dielectric FinFETs for liquid environment

Didier Bouvet, Mihai Adrian Ionescu, Sara Rigante

This work presents the technological development and characterization of n-channel fully depleted high-k dielectric FinFETs (Fin Field Effect Transistor) for applications in a liquid environment. Herein, we provide a systematic approach based on Finite Ele ...

Pergamon-Elsevier Science Ltd2014

Finfet with fully PH-responsive HfO2 as highly stable biochemical sensor

Didier Bouvet, Mihai Adrian Ionescu, Sara Rigante

In this work, highly scaled FinFETs (Fin Field Effect Transistors) are proposed as both sensing and circuit units of a lab-on-a-chip platform. The FinFET-based sensors with an HfO2 gate oxide demonstrate full pH-response with ΔVth ≈ 56 mV/pH. High readout ...

IEEE2014

Mobility Measurement in Nanowires Based on Magnetic Field-Induced Current Splitting Method in H-Shape Devices

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut, Farzan Jazaeri

This work investigates a new method to measure mobility in nanowires. Based on a simple analytical approach and numerical simulations, we bring evidence that the traditional technique of Hall voltage measurement in low dimensional structures such as nanowi ...

Institute of Electrical and Electronics Engineers2014

Transient Off-Current in Junctionless FETs

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut, Farzan Jazaeri

We report preliminary measurements of transient drain current undershoot with time constants of the order of milliseconds in thick and highly doped n-type junctionless fieldeffect transistors. This effect might be attributed to a process involving generati ...

Ieee-Inst Electrical Electronics Engineers Inc2013

Design Space of Twin Gate Junctionless Vertical Slit Field Effect Transistors

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut, Farzan Jazaeri

In this work, we present the technological constrains and limitations in the design of ultra-thin body Junctionless Vertical Slit Field Effect Transistor (JL VeSFET). A design space involving the intrinsic off-current, the sub-threshold swing, and the drai ...

2013

Downscaling and Short Channel Effects in Twin Gate Junctionless Vertical Slit FETs

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut, Farzan Jazaeri

we present the performance constraints in the design of ultra-thin body Junctionless Vertical Slit Field Effect Transistor (JL VeSFET). A design space that take into account the intrinsic off-current, the sub-threshold swing and the drain induced barrier l ...

2013

Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut, Farzan Jazaeri

This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonst ...

2013

Gate-all-around buckled dual Si nanowire nMOSFETs on bulk Si for transport enhancement and digital logic

Didier Bouvet, Mihai Adrian Ionescu, Mohammad Najmzadeh

In this paper, we report formation of GAA buckled dual Si nanowire MOSFETs including two sub-80 nm Si cores on bulk Si using 0.8 mu m optical lithography and local oxidation for the first time. 0.833 GPa uniaxial tensile stress is measured in the buckled s ...

Elsevier Science Bv2013

High-k dielectric FinFETs towards Sensing Integrated Circuits

Didier Bouvet, Mihai Adrian Ionescu, Sara Rigante

This work presents a well-defined electronic device, namely a n-channel high-k dielectric FinFET (Fin Field Effect Transistor) as new label-free sensor for enhanced sensing integrated circuits. Metal gate FinFETs on bulk Si have been successfully electrica ...

IEEE2013

Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility

Didier Bouvet, Mihai Adrian Ionescu, Wladyslaw Grabinski, Mohammad Najmzadeh

In this paper, we report for the first time making multi-gate buckled self-aligned dual Si nanowires including two sub-100 nm cross-section cores on bulk Si substrate using optical lithography, hard mask/spacer technology and local oxidation. 0.8 GPa uniax ...

Institute of Electrical and Electronics Engineers2012

Accumulation-mode gate-all-around Si nanowire nMOSFETs with sub-5 nm cross-section and high uniaxial tensile strain

Didier Bouvet, Jean-Michel Sallese, Mihai Adrian Ionescu, Wladyslaw Grabinski, Mohammad Najmzadeh

In this work we report dense arrays of accumulation-mode gate-all-around Si nanowire nMOSFETs with sub-5 nm cross-sections in a highly doped regime. The integration of local stressor technologies (both local oxidation and metal-gate strain) to achieve ⩾2.5 ...

Elsevier2012

Influence of chelating agents on the tribocorrosion of tungsten in sulphuric acid solution

Didier Bouvet, Michel Declercq, Stefano Mischler, Jelena Stojadinovic

The corrosion and tribocorrosion of tungsten in 0.01 M H2SO4, without and with the presence of lactic acid and phosphoric acid as chelating agents was studied here. ...

2011

Towards fabrication of Vertical Slit Field Effect Transistor (VeSFET) as new device for nano-scale CMOS technology

Didier Bouvet, Jean-Michel Sallese, Lucian Barbut

This paper proposes a CMOS based process for Vertical Slit Field Effect Transistors. The central part of the device, namely, the vertical slit, is defined by using electron beam lithography and silicon dry etching. In order to verify the validity and the r ...

IEEE2011

Modeling the Temperature Dependence of Fe-FET Static Characteristics Based on Landau's Theory

Didier Bouvet, Mihai Adrian Ionescu, Giovanni Antonio Salvatore, Livio Lattanzio

The performance of a standard MOSFET degrades with the increase in temperature, impacting the power consumption of the device. In this paper, we report the opposite trend, which is reflected in an improvement of main performance factors in ferroelectric FE ...

2011

The Curie temperature as a key design parameter of ferroelectric Field Effect Transistors

Didier Bouvet, Mihai Adrian Ionescu, Giovanni Antonio Salvatore, Livio Lattanzio

Interest in Ferroelectric FETs originates from their potential as non-volatile memories and, more recently, as abrupt switches. In this work, we focus on the role of the Curie temperature of the gate stack on the performance of Fe-FETs. The proposed study ...

IEEE2010

Silicon nanowires with lateral uniaxial tensile stress profiles for high electron mobility gate-all-around MOSFETs

Didier Bouvet, Mihai Adrian Ionescu, Luca De Michielis, Mohammad Najmzadeh

In this work we present for the first time correlation of lateral uniaxial tensile strain and I–V characteristics of GAA Si NW n-MOSFET, all measured on the same device. Micro-Raman spectroscopy is employed for direct strain measurement on devices to explo ...

Elsevier2010