Publications de Arnab Biswas | EPFL Graph Search

Tunnel fet based non-volatile memory boosted by vertical band-to-band tunneling

Mihai Adrian Ionescu, Arnab Biswas, Saurabh Tomar

A tunnel field effect transistor (TFET), including a source region, a gate region, a channel region, and a drain region, the gate region including a gate stack, wherein an area of the source region that is facing the channel region is overlapped by the gat ...

2018

A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor

Mihai Adrian Ionescu, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Arnab Biswas, Cem Alper, Emanuele Andrea Casu, Teodor Rosca, Anna Krammer, Qun Zhao

Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursu ...

Nature Research2017

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Florin Udrea, Arnab Biswas, Cem Alper

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

Hybrid phase-change — Tunnel FET (PC-TFET) switch with subthreshold swing < 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking

Mihai Adrian Ionescu, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Arnab Biswas, Cem Alper, Emanuele Andrea Casu, Teodor Rosca, Nicolò Oliva, Anna Krammer

In this paper we report the first hybrid Phase-Change - Tunnel FET (PC-TFET) device configurations for achieving a deep sub-thermionic steep subthreshold swing at room temperature and subthreshold power savings. The proposed hybrid device feedbacks the ste ...

IEEE2016

Single field effect transistor capacitor-less memory device and method of operating the same

Mihai Adrian Ionescu, Nilay Dagtekin, Arnab Biswas

A single field effect transistor capacitor-less memory device, and method of operating the same, including a drain region, a source region, an intrinsic channel region between the drain region and the source region forming the single field effect transisto ...

Technology Transfer Office EPFL2016

Compact modeling of DG-Tunnel FET for Verilog-A implementation

Mihai Adrian Ionescu, Luca De Michielis, Arnab Biswas, Antonios Bazigos

In this work, a compact model based on an analytical closed form solution of the 1D Poisson's equation for a double-gate Tunnel FET is derived. Furthermore, the current levels are estimated by implementing an algorithm based on the Kane's band-to-band tunn ...

IEEE2015

Tunnel Field Effect Transistors : from Steep-Slope Electronic Switches to Energy Efficient Logic Applications

Arnab Biswas

The aim of this work has been the investigation of homo-junction Tunnel Field Effect Transistors starting from a compact modelling perspective to its possible applications. Firstly a TCAD based simulation study is done to explain the main device characteri ...

EPFL2015

A capacitance-voltage model for DG-TFET

Mihai Adrian Ionescu, Arnab Biswas

IEEE, Piscataway, NJ, USA2015

Conformal Mapping Based DC Current Model For Double Gate Tunnel FETs

Mihai Adrian Ionescu, Luca De Michielis, Arnab Biswas, Cem Alper

In this work, the conformal mapping technique is applied to obtain an analytical closed form solution of the 2D Poisson’s equation for a double-gate Tunnel FET. The generated band profiles are accurate in all regions of device operation. Furthermore, the c ...

IEEE2014

Investigation of Tunnel Field-Effect Transistors as a Capacitor-less Memory Cell

Mihai Adrian Ionescu, Wladyslaw Grabinski, Nilay Dagtekin, Arnab Biswas, Antonios Bazigos

In this work we report experimental results on the use of Tunnel Field-Effect Transistors (TFET) as capacitorless Dynamic Random Access Memory (DRAM) cells, implemented as a double-gate (DG) Fully-Depleted Silicon-On-Insulator (FD-SOI) devices. The devices ...

American Institute of Physics2014

1T Capacitor-less DRAM cell based on asymmetric Tunnel FET design

Mihai Adrian Ionescu, Arnab Biswas

In this work we propose and demonstrate the use of a Tunnel FET (TFET) as capacitorless DRAM cell based on TCAD simulations and experiments. We report more experimental results on Tunnel FETs implemented as a double-gate (DG) fully-depleted Silicon-On-Insu ...

2014

Study of Fin-Tunnel FETs with doped pocket as Capacitor-less 1T DRAM

Mihai Adrian Ionescu, Arnab Biswas

IEEE2014

Compact Modeling of Homojunction Tunnel FETs

Mihai Adrian Ionescu, Wladyslaw Grabinski, Luca De Michielis, Nilay Dagtekin, Arnab Biswas, Antonios Bazigos, Cem Alper

Aggressive scaling of the supply voltage reduces the energy needed for switching of standard CMOS devices. However, advanced CMOS technologies are facing two main problems that consequently lead to higher power consumption: the complexity of a further supp ...

IEEE2014

An innovative band-to-band tunneling analytical model and implications in compact modeling of tunneling-based devices

Mihai Adrian Ionescu, Luca De Michielis, Nilay Dagtekin, Livio Lattanzio, Luca Selmi, Arnab Biswas, Heike Riel

In this paper, an analytical band-to-band tunneling model is proposed, validated by means of drift-diffusion simulation and comparison with experimental data, implemented in Verilog-A, and finally proven with SPICE simulator through simulation of circuits ...

American Institute of Physics2013

A study on 1T Capacitor-less Tunnel FET DRAM Exploiting Ungated Body

Mihai Adrian Ionescu, Wladyslaw Grabinski, Nilay Dagtekin, Arnab Biswas, Antonios Bazigos

IEEE2013

A Novel Extraction Method and Compact Model for the Steepness Estimation of FDSOI TFET Lateral Junction

Mihai Adrian Ionescu, Wladyslaw Grabinski, Arnab Biswas, Surya Shankar Dan

There are several techniques for junction profiling available in literature, yet none of them are practically suitable for the accurate determination of the lateral junction steepness in TFET devices, which is the most important parameter influencing TFET ...

Institute of Electrical and Electronics Engineers2012

TCAD Simulation of SOI TFETs and Calibration of Non-local Band-to-Band Tunneling Model

Mihai Adrian Ionescu, Wladyslaw Grabinski, Arnab Biswas, Surya Shankar Dan

This paper reports a simulation based study of the non-local tunneling model using a commercially available technology computer-aided design (TCAD) device simulator. Single gate Tunnel FET devices with 400nm gate length based on SOI technology are measured ...

Elsevier2012

New Tunnel-FET Architecture with Enhanced Ion and Improved Miller Effect for Energy Efficient Switching

Mihai Adrian Ionescu, Luca De Michielis, Arnab Biswas, Cem Alper

Tunneling Field Effect Transistors (TFET) are promising devices to respond to the demanding requirements of future technology nodes. The benefits of the TFETs are linked to their sub-60mV/decade sub-threshold swing, a prerequisite for scaling the supply vo ...

2012

A tunneling field-effect transistor exploiting internally combined band-to-band and barrier tunneling mechanisms

Mihai Adrian Ionescu, Luca De Michielis, Livio Lattanzio, Arnab Biswas

This letter proposes a hybrid abrupt switch principle and a corresponding device architecture that combines quantum mechanical band-to-band and barrier tunneling mechanisms. The device overcomes the intrinsically low on-current (I-ON) of conventional tunne ...

AIP American Institute of Physics2011

Abrupt switch based on internally combined band-to-band and barrier tunneling mechanisms

Mihai Adrian Ionescu, Luca De Michielis, Livio Lattanzio, Arnab Biswas

We report a simulation-based study of an all-silicon novel device which exploits internally combined quantum mechanical band-to-band and barrier tunneling mechanisms to overcome the intrinsic low current drive limitations of conventional silicon Tunnel FET ...

2010